The present invention relates to a semiconductor memory device; more particularly, to semiconductor memory device capable of detecting an internal voltage in a package.
Semiconductor memory devices are generally manufactured through a wafer process. A plurality of tests are performed to examine the reliability of internal circuits in a device. Semiconductor memory devices, such as a dynamic random access memory (DRAM) and a static random access memory (SRAM), are examined by such tests. The reliability tests for the semiconductor memory device are mainly categorized as wafer tests and package tests. The wafer tests are performed before a packaging process for a device and the package tests are performed after the packaging process for the device.
Accordingly, the package tests for detecting the internal voltage of the semiconductor memory device in the package or detecting a common potential by coupling each internal voltage node requires a special bonding method. For the special bonding, a part of data pins or a part of address pins is required to be boned with a predetermined pad which the test will be performed through.
Because the part of data pins or the part of address pins is used only for the test when detecting the internal voltage through the special bonding method, regular operations or other tests which use the parts of data and address pins for its real purpose cannot be performed normally.